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Chapter 3: Design Rules and Procedures
Using a MATLAB Variable
Begin all port names with a letter (a - z). VHDL does not allow identifiers to begin
with non-alphabetic characters or end with an underscore.
Do not use two underscores in succession (__) in port names because it is illegal in
VHDL.
1
White spaces in the names for the blocks, components, and signals are converted to an
underscore when DSP Builder converts the Simulink model file ( .mdl ) into VHDL.
Using a MATLAB Variable
You can specify many block parameters (such as bit widths and pipeline depth) by
entering a MATLAB base workspace or masked subsystem variable. You can then set
these variables on the MATLAB command line or from a script. DSP Builder evaluates
the variable and passes its value to the simulation model files. DSP Builder ensures
that the parameters are in the required range.
1
Although DSP Builder no longer restricts parameters to 51 bits, MATLAB evaluates
parameter values to doubles, which restricts the possible values to 51-bit numbers
expressible by a double.
f For information about which values are parameterizable, refer to the DSP Builder
Standard Blockset Libraries section in volume 2 of the DSP Builder Handbook or to the
block descriptions, which you can access with the Help command in the right button
pop-up menu for each block.
Fixed-Point Notation
Figure 3–1 describes the fixed-point notation that I/O formats use in the DSP Builder
block descriptions.
Table 3–1. Fixed-Point Notation
Description
Signed binary:
fractional (SBF)
representation; a
fractional number
Notation
[L] is the number of bits to the left of
the binary point and the MSB is the
[L].[R] where: sign bit
[R] is the number of bits to the right
of the binary point
Simulink-to-HDL Translation
(1) , (2)
A Simulink SBF signal A[L].[R] maps in VHDL to
STD_LOGIC_VECTOR({L + R - 1} DOWNTO 0)
Signed binary;
integer (INT)
Unsigned binary;
integer (UINT)
DSP Builder Handbook
[L] where:
[L] where:
[L] is the number of bits of the
signed bus and the MSB is the sign
bit
[L] is the number of bits of the
unsigned bus
A Simulink signed binary signal A[L] maps to
STD_LOGIC_VECTOR({L - 1} DOWNTO 0)
A Simulink unsigned binary signal A[L] maps to
STD_LOGIC_VECTOR({L - 1} DOWNTO 0)
November 2013 Altera Corporation
Volume 2: DSP Builder Standard Blockset
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